Logic Synthesis for Finite State Machines Based on Linear Chains of States
Foundations, Recent Developments and Challenges
Nonfiction, Science & Nature, Technology, Electronics, Circuits, Computers, Advanced Computing, Artificial Intelligence, General Computing
| Author: | Larysa Titarenko, Alexander Barkalov, Jacek Bieganowski | ISBN: | 9783319598376 |
| Publisher: | Springer International Publishing | Publication: | June 24, 2017 |
| Imprint: | Springer | Language: | English |
| Author: | Larysa Titarenko, Alexander Barkalov, Jacek Bieganowski |
| ISBN: | 9783319598376 |
| Publisher: | Springer International Publishing |
| Publication: | June 24, 2017 |
| Imprint: | Springer |
| Language: | English |
This book discusses Moore finite state machines (FSMs) implemented with field programmable gate arrays (FPGAs) including look-up table (LUT) elements and embedded memory blocks (EMBs). To minimize the number of LUTs in FSM logic circuits, the authors propose replacing a state register with a state counter. They also put forward an approach allowing linear chains of states to be created, which simplifies the system of input memory functions and, therefore, decreases the number of LUTs in the resulting FSM circuit. The authors combine this approach with using EMBs to implement the system of output functions (microoperations). This allows a significant decrease in the number of LUTs, as well as eliminating a lot of interconnections in the FSM logic circuit. As a rule, it also reduces the area occupied by the circuit and diminishes the resulting power dissipation.
This book is an interesting and valuable resource for students and postgraduates in the area of computer science, as well as for designers of digital systems that included complex control units
This book discusses Moore finite state machines (FSMs) implemented with field programmable gate arrays (FPGAs) including look-up table (LUT) elements and embedded memory blocks (EMBs). To minimize the number of LUTs in FSM logic circuits, the authors propose replacing a state register with a state counter. They also put forward an approach allowing linear chains of states to be created, which simplifies the system of input memory functions and, therefore, decreases the number of LUTs in the resulting FSM circuit. The authors combine this approach with using EMBs to implement the system of output functions (microoperations). This allows a significant decrease in the number of LUTs, as well as eliminating a lot of interconnections in the FSM logic circuit. As a rule, it also reduces the area occupied by the circuit and diminishes the resulting power dissipation.
This book is an interesting and valuable resource for students and postgraduates in the area of computer science, as well as for designers of digital systems that included complex control units
